IEEE

Design of Ternary Logic and Arithmetic Circuits Using GNRFET

Abstract: Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits. Compared to the conventional and ...
Nature

Robust and compact reversible logic gate for low-power and high-performance computing

Reversible logic is a design paradigm suitable to energy-efficient digital systems and has lately received recognition as a viable option for designing sophisticated digital applications. It possesses ...
Nature

Optimized low power hybrid adder architecture for OFDM in wireless communication

The contemporary wireless communication system makes full use of the available spectrum by making it possible to adapt to various channel situations. The extremely well-organized multi-carrier ...
IEEE

Design and Implementation of Full Adder using 4 to 1 line Multiplexer Based on Nonlinear Switching Micro Ring Resonator Structure

Abstract: This paper intended to assert the designing of the four to one line multiplexer logic using nonlinear switching techniques based on Micro Ring Resonator (MRR) structure for the proposed full ...
circuitdigest.com

SR Flip-Flop with NAND Gates: Circuit, Truth Table and Working

circuitdigest_preprocess_comment(Array, 'comment', Array) call_user_func_array('circuitdigest_preprocess_comment', Array) (Line: 261) Drupal\Core\Theme\ThemeManager ...