SiFive’s role in creating RISC-V and driving it forward. How RISC-V transformed from a student project into a globally used architecture. The importance of open-standard architecture. RISC-V ...

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

The partnership focuses on integrating eSOL’s “real-time” operating system technology with Quintauris’ RISC-V platforms.

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...

For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...

The Android Common Kernel is about to remove support for the RISC-V architecture. Android Common Kernel is Google’s fork of the upstream Linux kernel but with Android-specific additions. RISC-V is an ...