EDN

MIPS debuts new cores, instruction set

SAN JOSE, Calif. — MIPS Technologies Inc. is upgrading two of its cores and introducing a new instruction set architecture. The products aim to expand the company's relatively small presence in 32-bit ...
EDN

Cores extend a standard instruction-set architecture

MIPS Technologies is now offering the Pro Series family of synthesizable cores supporting accelerated, application-specific instructions within the MIPS instruction set. These cores add MIPS CorExtend ...
Bit-Tech

Wave Computing sets MIPS free

Wave Computing, the new owner of the MIPS instruction set architecture, has announced it plans to compete with increasingly-popular open alternative RISC-V in the only logical way: by opening MIPS up ...
Electronics Weekly

MIPS introduces two cores and 16bit instruction set

MIPS Technologies has introduced two cores and a 16bit instruction set. The M14K and M14Kc have the same 1.5DMips/MHz performance as the firm’s existing 4K series, with which they share a five-stage ...
Design-Reuse

MIPS, ARC look to compress instruction code

LONDON — MIPS Technologies Inc. and ARC International plc, leading examples of companies that license their intellectual property rather than ship it in their own silicon, are set to make ...
Electronics Weekly

MIPS moves closer to running Android on set-tops

MIPS Technologies has stepped up its plan to widen the market applications for Android platform beyond mobiles. Following its port of the Android platform to the MIPS architecture, the microprocessor ...
PC Magazine

MIPS Technologies Introduces 64-Bit Multithreaded SMT Core

MIPS Technologies, a company that has produced chips that have previously driven devices like TVs and set-top boxes, announced today its plans to offer the first IP core that combines a 64-bit ...