Morningstar

QuickLogic eFPGA Hard IP Selected by Chipus for 12 nm High Performance Data Center ASIC

Selection underscores QuickLogic's ability to deliver flexible, silicon-proven IP that reduces ASIC risk and shortens design cycles for commercial applications SAN JOSE, Calif., Nov. 18, 2025 ...
Design And Reuse

Faraday Broadens IP Offerings on UMC’s 14nm Process for Edge AI and Consumer Markets

Faraday continues building out its IP solutions on UMC’s 14nm node. All these IPs are silicon-proven to ensure production-quality, significantly reducing design risk while assisting designers in ...
Electronic Design

Pre-Fabricated ASIC Platforms Eye High-Performance Systems

Two predesigned ASIC platform slices, the RapidChip Xtreme and RapidChip Integrator, are now members of LSI Logic's ASIC platform family. The Xtreme platform is optimized for high-performance, ...
Business Insider

eSilicon to present: Enabling Technology for the Cloud and AI – One Size Fits All?Design & Reuse IP SoC Day Santa Clara 2018

SAN JOSE, Calif., March 27, 2018 (GLOBE NEWSWIRE) -- eSilicon, an independent provider of FinFET-class ASICs, custom IP and advanced 2.5D packaging solutions, will present Enabling Technology for the ...