Design-Reuse

Low Power Universal Gates for Approximate Computing

Density and speed of IC’s have increased exponentially for several decades, following a trend described by Moore’s Law. While it is accepted that this exponential improvement trend will end, it is ...
Houston Chronicle

(BW) SEMATECH Develops Dual Metal Gates for high-k CMOS Devices; Completes Quest With pMOS Breakthrough

Taking the final step in the quest for dual metal gates, SEMATECH engineers have demonstrated high-k/metal gate stacks that were used to build high-performance nMOS and pMOS transistors in a CMOS ...
Semiconductor Engineering

CAM-Based CMOS Implementation Of Reference Frames For Neuromorphic Processors (Carnegie Mellon U.)

“Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient alternative to conventional von Neumann architectures for the exploding compute demands of ...
EDN

First CMOS 3G power amp heads for Mobile World Congress

HASBROUCK HEIGHTS, N.J. — The founding engineers of Javelin Semiconductor have developed the first working CMOS implementation of a 3G power amplifier (PA), pulling ahead in a small field of ...