Design-Reuse

Altera and Micron Announce Industry’s First DDR400 SDRAM DIMM Interface for FPGAs

San Jose, Calif., and Boise, Id., November 3, 2003—Altera Corporation (NASDAQ: ALTR) and Micron Technology, Inc., (NYSE: MU) today announced the industry’s first 400 Mbps double data rate (DDR) ...
Design-Reuse

Xylon Announces logiSPI SPI to AXI4 Controller Bridge IP Core for Xilinx Zynq-7000 AP SoC and FPGAs

Zagreb, Croatia -- January 7, 2013-- New logiSPI SPI to AXI4 Controller Bridge IP core from Xylon's logicBRICKSâ„¢ IP library enables easy inter-chip board-level interfacing between virtually any ...
Electronic Design

Custom Blocks Fortify eFPGAs While Shrinking ASIC/SoC Die Size

For more than three decades, system-level designers have employed FPGAs for multitude of reasons, but the two main factors are performance and flexibility. Many tasks executed in software running on a ...
EDN

Bridging Xilinx Streaming Video Interface with the AXI4-Stream Protocol

The ARM® core AMBA® specification (version 4.0) AXI interconnect standard includes three Advanced eXtensible Interface version 4 (AXI4) interconnect protocols—AXI4 interconnect, AXI4-Lite protocol, ...